DISPATCH: Design Space Exploration of Cyber-Physical Systems
- URL: http://arxiv.org/abs/2009.10214v2
- Date: Fri, 25 Sep 2020 00:06:05 GMT
- Title: DISPATCH: Design Space Exploration of Cyber-Physical Systems
- Authors: Prerit Terway, Kenza Hamidouche, and Niraj K. Jha
- Abstract summary: Design of cyber-physical systems (CPSs) is a challenging task that involves searching over a large search space of various CPS configurations.
We propose DIS, a two-step methodology for sample-efficient search over the design space.
- Score: 5.273291582861981
- License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
- Abstract: Design of cyber-physical systems (CPSs) is a challenging task that involves
searching over a large search space of various CPS configurations and possible
values of components composing the system. Hence, there is a need for
sample-efficient CPS design space exploration to select the system architecture
and component values that meet the target system requirements. We address this
challenge by formulating CPS design as a multi-objective optimization problem
and propose DISPATCH, a two-step methodology for sample-efficient search over
the design space. First, we use a genetic algorithm to search over discrete
choices of system component values for architecture search and component
selection or only component selection and terminate the algorithm even before
meeting the system requirements, thus yielding a coarse design. In the second
step, we use an inverse design to search over a continuous space to fine-tune
the component values and meet the diverse set of system requirements. We use a
neural network as a surrogate function for the inverse design of the system.
The neural network, converted into a mixed-integer linear program, is used for
active learning to sample component values efficiently in a continuous search
space. We illustrate the efficacy of DISPATCH on electrical circuit benchmarks:
two-stage and three-stage transimpedence amplifiers. Simulation results show
that the proposed methodology improves sample efficiency by 5-14x compared to a
prior synthesis method that relies on reinforcement learning. It also
synthesizes circuits with the best performance (highest bandwidth/lowest area)
compared to designs synthesized using reinforcement learning, Bayesian
optimization, or humans.
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