Quantum chip design optimization and automation in superconducting coupler architecture

• URL: http://arxiv.org/abs/2212.13751v2
• Date: Fri, 15 Mar 2024 04:28:33 GMT
• Title: Quantum chip design optimization and automation in superconducting coupler architecture
• Authors: Fei-Yu Li, Li-Jing Jin,
• Abstract summary: Superconducting coupler architecture demonstrates great potential for scalable and high-performance quantum processors. How to design efficiently and automatically 'Qubit-Coupler-Qubit (QCQ)' of high performance from the layout perspective remains obscure. We acquire the crucial zero-coupling condition that is only dependent on the geometric design of the layout. We propose an optimal layout design procedure to reach the very upper bound, leading to efficient and high-performance layout design.
• Score: 0.0
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Superconducting coupler architecture demonstrates great potential for scalable and high-performance quantum processors, yet how to design efficiently and automatically 'Qubit-Coupler-Qubit (QCQ)' of high performance from the layout perspective remains obscure. In this work, this issue is studied for the first time resulting in three key findings. Firstly, we acquire the crucial zero-coupling condition that is only dependent on the geometric design of the layout. Secondly, the upper bound of the qubit-qubit effective coupling is found as $0.0822~ \omega_l/\beta_s^2$ which surprisingly depends only on the artificially pre-decided quantities $\omega_l, \beta_s$ instead of specific layouts. Thirdly, we propose an optimal layout design procedure to reach the very upper bound, leading to efficient and high-performance layout design. The effectiveness of the procedure has been demonstrated scrupulously using electromagnetic simulation experiments. As a stirring application, we report a state-of-the-art 3202 um long-range and scalable QCQ layout that is especially crucial to quantum error correction. Our work provides practical guides to optimize the performance of the existing coupler architecture, find out novel layouts, and further advance the progress of quantum chip design automation.

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