Co-Design of Approximate Multilayer Perceptron for Ultra-Resource Constrained Printed Circuits

• URL: http://arxiv.org/abs/2302.14576v1
• Date: Tue, 28 Feb 2023 13:55:19 GMT
• Title: Co-Design of Approximate Multilayer Perceptron for Ultra-Resource Constrained Printed Circuits
• Authors: Giorgos Armeniakos, Georgios Zervakis, Dimitrios Soudris, Mehdi B. Tahoori, J\"org Henkel
• Abstract summary: Large feature sizes in Printed Electronics (PE) prohibit the realization of complex printed machine learning circuits. We present, for the first time, an automated printed-aware software/hardware co-design framework that exploits approximate computing principles to enable ultra-resource constrained printed multilayer perceptrons (MLPs) Our evaluation demonstrates that, compared to the state-of-the-art baseline, our circuits feature on average 6x (5.7x) lower area (power) and less than 1% accuracy loss.
• Score: 4.865819809855699
• License: http://creativecommons.org/licenses/by-nc-nd/4.0/
• Abstract: Printed Electronics (PE) exhibits on-demand, extremely low-cost hardware due to its additive manufacturing process, enabling machine learning (ML) applications for domains that feature ultra-low cost, conformity, and non-toxicity requirements that silicon-based systems cannot deliver. Nevertheless, large feature sizes in PE prohibit the realization of complex printed ML circuits. In this work, we present, for the first time, an automated printed-aware software/hardware co-design framework that exploits approximate computing principles to enable ultra-resource constrained printed multilayer perceptrons (MLPs). Our evaluation demonstrates that, compared to the state-of-the-art baseline, our circuits feature on average 6x (5.7x) lower area (power) and less than 1% accuracy loss.

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