Related papers: Wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions for superconducting quantum processors

Wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions for superconducting quantum processors

URL: http://arxiv.org/abs/2304.09111v1
Date: Tue, 18 Apr 2023 16:18:08 GMT
Title: Wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions for superconducting quantum processors
Authors: N. Muthusubramanian, P. Duivestein, C. Zachariadis, M. Finkel, S. L. M. van der Meer, H. M. Veen, M. W. Beekman, T. Stavenga, A. Bruno, and L. DiCarlo
Abstract summary: We investigate die-level and wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan Josephson junctions. Dolan junctions fabricated on planar substrates have the highest yield and lowest room-temperature conductance spread, equivalent to 100 MHz in transmon frequency. In TSV-integrated substrates, Dolan junctions suffer most in both yield and disorder, making Manhattan junctions preferable.
Score: 0.0
License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
Abstract: We investigate die-level and wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan Josephson junctions, using multiple substrates with and without through-silicon vias (TSVs). Dolan junctions fabricated on planar substrates have the highest yield and lowest room-temperature conductance spread, equivalent to ~100 MHz in transmon frequency. In TSV-integrated substrates, Dolan junctions suffer most in both yield and disorder, making Manhattan junctions preferable. Manhattan junctions show pronounced conductance decrease from wafer centre to edge, which we qualitatively capture using a geometric model of spatially-dependent resist shadowing during junction electrode evaporation. Analysis of actual junction overlap areas using scanning electron micrographs supports the model, and further points to a remnant spatial dependence possibly due to contact resistance.

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