Low-power event-based face detection with asynchronous neuromorphic
hardware
- URL: http://arxiv.org/abs/2312.14261v1
- Date: Thu, 21 Dec 2023 19:23:02 GMT
- Title: Low-power event-based face detection with asynchronous neuromorphic
hardware
- Authors: Caterina Caccavella, Federico Paredes-Vall\'es, Marco Cannici, Lyes
Khacef
- Abstract summary: We present the first instance of an on-chip spiking neural network for event-based face detection deployed on the SynSense Speck neuromorphic chip.
We show how to reduce precision discrepancies between off-chip clock-driven simulation used for training and on-chip event-driven inference.
We achieve an on-chip face detection mAP[0.5] of 0.6 while consuming only 20 mW.
- Score: 2.0774873363739985
- License: http://creativecommons.org/licenses/by-nc-nd/4.0/
- Abstract: The rise of mobility, IoT and wearables has shifted processing to the edge of
the sensors, driven by the need to reduce latency, communication costs and
overall energy consumption. While deep learning models have achieved remarkable
results in various domains, their deployment at the edge for real-time
applications remains computationally expensive. Neuromorphic computing emerges
as a promising paradigm shift, characterized by co-localized memory and
computing as well as event-driven asynchronous sensing and processing. In this
work, we demonstrate the possibility of solving the ubiquitous computer vision
task of object detection at the edge with low-power requirements, using the
event-based N-Caltech101 dataset. We present the first instance of an on-chip
spiking neural network for event-based face detection deployed on the SynSense
Speck neuromorphic chip, which comprises both an event-based sensor and a
spike-based asynchronous processor implementing Integrate-and-Fire neurons. We
show how to reduce precision discrepancies between off-chip clock-driven
simulation used for training and on-chip event-driven inference. This involves
using a multi-spike version of the Integrate-and-Fire neuron on simulation,
where spikes carry values that are proportional to the extent the membrane
potential exceeds the firing threshold. We propose a robust strategy to train
spiking neural networks with back-propagation through time using multi-spike
activation and firing rate regularization and demonstrate how to decode output
spikes into bounding boxes. We show that the power consumption of the chip is
directly proportional to the number of synaptic operations in the spiking
neural network, and we explore the trade-off between power consumption and
detection precision with different firing rate regularization, achieving an
on-chip face detection mAP[0.5] of ~0.6 while consuming only ~20 mW.
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