Designing fault-tolerant circuits using detector error models

• URL: http://arxiv.org/abs/2407.13826v1
• Date: Thu, 18 Jul 2024 18:00:05 GMT
• Title: Designing fault-tolerant circuits using detector error models
• Authors: Peter-Jan H. S. Derks, Alex Townsend-Teague, Ansgar G. Burchards, Jens Eisert,
• Abstract summary: We explore the powerful formalism of detector error models, which fully captures fault-tolerance at the circuit level. We apply the formalism to three different levels of abstraction in the engineering cycle of fault-tolerant circuit designs.
• Score: 0.29998889086656577
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: Quantum error-correcting codes, such as subspace, subsystem, and Floquet codes, are typically constructed within the stabilizer formalism, which does not fully capture the idea of fault-tolerance needed for practical quantum computing applications. In this work, we explore the remarkably powerful formalism of detector error models, which fully captures fault-tolerance at the circuit level. We introduce the detector error model formalism in a pedagogical manner and provide several examples. Additionally, we apply the formalism to three different levels of abstraction in the engineering cycle of fault-tolerant circuit designs: finding robust syndrome extraction circuits, identifying efficient measurement schedules, and constructing fault-tolerant procedures. We enhance the surface code's resistance to measurement errors, devise short measurement schedules for color codes, and implement a more efficient fault-tolerant method for measuring logical operators.

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