Harnessing Room-Temperature Ferroelectricity in Metal Oxide Monolayers for Advanced Logic Devices

• URL: http://arxiv.org/abs/2410.19582v1
• Date: Fri, 25 Oct 2024 14:21:56 GMT
• Title: Harnessing Room-Temperature Ferroelectricity in Metal Oxide Monolayers for Advanced Logic Devices
• Authors: Ateeb Naseer, Musaib Rafiq, Somnath Bhowmick, Amit Agarwal, Yogesh Singh Chauhan,
• Abstract summary: Two-dimensional ferroelectric materials are beneficial for power-efficient memory devices and transistor applications. We predict out-of-plane ferroelectricity in a new family of buckled metal oxide monolayers with significant spontaneous polarization. Our work motivates further exploration of the MO monolayers for developing advanced, high-performance memory and logic devices.
• Score: 1.237067623522156
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• Abstract: Two-dimensional ferroelectric materials are beneficial for power-efficient memory devices and transistor applications. Here, we predict out-of-plane ferroelectricity in a new family of buckled metal oxide (MO; M: Ge, Sn, Pb) monolayers with significant spontaneous polarization. Additionally, these monolayers have a narrow valence band, which is energetically separated from the rest of the low-lying valence bands. Such a unique band structure limits the long thermal tail of the hot carriers, mitigating subthreshold thermionic leakage and allowing field-effect transistors (FETs) to function beyond the bounds imposed on conventional FETs by thermodynamics. Our quantum transport simulations reveal that the FETs based on these MO monolayers exhibit a large ON/OFF ratio with an average subthreshold swing of less than 60 mV/decade at room temperature, even for short gate lengths. Our work motivates further exploration of the MO monolayers for developing advanced, high-performance memory and logic devices.

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