Quantum SWAP gate realized with CZ and iSWAP gates in a superconducting architecture

• URL: http://arxiv.org/abs/2412.15022v1
• Date: Thu, 19 Dec 2024 16:32:36 GMT
• Title: Quantum SWAP gate realized with CZ and iSWAP gates in a superconducting architecture
• Authors: Christian Križan, Janka Biznárová, Liangyu Chen, Emil Hogedal, Amr Osman, Christopher W. Warren, Sandoko Kosen, Hang-Xi Li, Tahereh Abad, Anuj Aggarwal, Marco Caputo, Jorge Fernández-Pendás, Akshay Gaikwad, Leif Grönberg, Andreas Nylander, Robert Rehammar, Marcus Rommel, Olga I. Yuzephovich, Anton Frisk Kockum, Joonas Govenius, Giovanna Tancredi, Jonas Bylander,
• Abstract summary: It is advantageous for any quantum processor to support different classes of two-qubit quantum logic gates when compiling quantum circuits. Access to a gate set that includes support for the CZ-type, affirming the iSWAP-type, and the SWAP-type families of gates, renders conversions between these gate families unnecessary during compilation. We experimentally demonstrate that a SWAP gate can be decomposed into one iSWAP gate followed by one CZ gate, a more efficient compilation strategy.
• Score: 2.5849951815113874
• License:
• Abstract: It is advantageous for any quantum processor to support different classes of two-qubit quantum logic gates when compiling quantum circuits, a property that is typically not seen with existing platforms. In particular, access to a gate set that includes support for the CZ-type, the iSWAP-type, and the SWAP-type families of gates, renders conversions between these gate families unnecessary during compilation as any two-qubit Clifford gate can be executed using at most one two-qubit gate from this set, plus additional single-qubit gates. We experimentally demonstrate that a SWAP gate can be decomposed into one iSWAP gate followed by one CZ gate, affirming a more efficient compilation strategy over the conventional approach that relies on three iSWAP or three CZ gates to replace a SWAP gate. Our implementation makes use of a superconducting quantum processor design based on fixed-frequency transmon qubits coupled together by a parametrically modulated tunable transmon coupler, extending this platform's native gate set so that any two-qubit Clifford unitary matrix can be realized using no more than two two-qubit gates and single-qubit gates.

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