SFATTI: Spiking FPGA Accelerator for Temporal Task-driven Inference -- A Case Study on MNIST

• URL: http://arxiv.org/abs/2507.10561v1
• Date: Fri, 04 Jul 2025 08:22:13 GMT
• Title: SFATTI: Spiking FPGA Accelerator for Temporal Task-driven Inference -- A Case Study on MNIST
• Authors: Alessio Caviglia, Filippo Marostica, Alessio Carpegna, Alessandro Savino, Stefano Di Carlo,
• Abstract summary: Spiking Neural Networks (SNNs) are promising due to their event-driven and temporally sparse nature.<n>This paper explores using the open-source Spiker+ framework to generate optimized SNNs accelerators for handwritten digit recognition.
• Score: 39.79758414095764
• License: http://creativecommons.org/licenses/by-nc-sa/4.0/
• Abstract: Hardware accelerators are essential for achieving low-latency, energy-efficient inference in edge applications like image recognition. Spiking Neural Networks (SNNs) are particularly promising due to their event-driven and temporally sparse nature, making them well-suited for low-power Field Programmable Gate Array (FPGA)-based deployment. This paper explores using the open-source Spiker+ framework to generate optimized SNNs accelerators for handwritten digit recognition on the MNIST dataset. Spiker+ enables high-level specification of network topologies, neuron models, and quantization, automatically generating deployable HDL. We evaluate multiple configurations and analyze trade-offs relevant to edge computing constraints.

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