TopoSizing: An LLM-aided Framework of Topology-based Understanding and Sizing for AMS Circuits

• URL: http://arxiv.org/abs/2509.14169v1
• Date: Wed, 17 Sep 2025 16:52:46 GMT
• Title: TopoSizing: An LLM-aided Framework of Topology-based Understanding and Sizing for AMS Circuits
• Abstract summary: Traditional black-box optimization achieves sampling efficiency but lacks circuit understanding.<n>We propose TopoSizing, an end-to-end framework that performs robust circuit understanding directly from raw netlists.
• Score: 7.615431299673158
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Analog and mixed-signal circuit design remains challenging due to the shortage of high-quality data and the difficulty of embedding domain knowledge into automated flows. Traditional black-box optimization achieves sampling efficiency but lacks circuit understanding, which often causes evaluations to be wasted in low-value regions of the design space. In contrast, learning-based methods embed structural knowledge but are case-specific and costly to retrain. Recent attempts with large language models show potential, yet they often rely on manual intervention, limiting generality and transparency. We propose TopoSizing, an end-to-end framework that performs robust circuit understanding directly from raw netlists and translates this knowledge into optimization gains. Our approach first applies graph algorithms to organize circuits into a hierarchical device-module-stage representation. LLM agents then execute an iterative hypothesis-verification-refinement loop with built-in consistency checks, producing explicit annotations. Verified insights are integrated into Bayesian optimization through LLM-guided initial sampling and stagnation-triggered trust-region updates, improving efficiency while preserving feasibility.

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