Not All Qubits are Utilized Equally

• URL: http://arxiv.org/abs/2509.19241v1
• Date: Tue, 23 Sep 2025 17:01:39 GMT
• Title: Not All Qubits are Utilized Equally
• Authors: Jeremie Pope, Swaroop Ghosh,
• Abstract summary: We analyze average qubit utilization of a quantum hardware as a means to identify how various transpiler configurations change utilization patterns.<n>We present the preliminary results of this analysis using IBM's 27-qubit Falcon R4 architecture on the Qiskit platform.
• Score: 0.6015898117103067
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: Improvements to the functionality of modern Noisy Intermediate-Scale Quantum (NISQ) computers have coincided with an increase in the total number of physical qubits. Quantum programmers do not commonly design circuits that directly utilize these qubits; instead, they rely on various software suites to algorithmically transpile the circuit into one compatible with a target machine's architecture. For connectivity-constrained superconducting architectures in particular, the chosen syntheses, layout, and routing algorithms used to transpile a circuit drastically change the average utilization patterns of physical qubits. In this paper, we analyze average qubit utilization of a quantum hardware as a means to identify how various transpiler configurations change utilization patterns. We present the preliminary results of this analysis using IBM's 27-qubit Falcon R4 architecture on the Qiskit platform for a subset of qubits, gate distributions, and optimization configurations. We found a persistent bias towards trivial mapping, which can be addressed through increased optimization provided that the overall utilization of an architecture remains below a certain threshold. As a result, some qubits are overused whereas other remain underused. The implication of our study are many-fold namely, (a) potential reduction in calibration overhead by focusing on overused qubits, (b) refining optimization, mapping and routing algorithms to maximize the hardware utilization and (c) pricing underused qubits at low rate to motivate their usage and improve hardware throughput (applicable in multi-tenant environments).

Related papers

• COMPAS: A Distributed Multi-Party SWAP Test for Parallel Quantum Algorithms [4.584616394519209]
  We introduce COMPAS, an architecture that realizes multivariate trace estimation across a multi-party network of interconnected modular and distributed QPUs.<n>Unlike other schemes, which must choose between optimality in circuit depth or GHZ width, COMPAS achieves both at once.<n>We analyze network-level errors and simulate the effects of circuit-level noise on the architecture.
  arXiv  Detail & Related papers  (2025-11-28T18:31:15Z)
• A Fast and Adaptable Algorithm for Optimal Multi-Qubit Pathfinding in Quantum Circuit Compilation [0.0]
  This work focuses on multi-qubit pathfinding as a critical subroutine within the quantum circuit compilation mapping problem. We introduce an algorithm, modelled using binary integer linear programming, that navigates qubits on quantum hardware optimally with respect to circuit SWAP-gate depth. We have benchmarked the algorithm across a variety of quantum hardware layouts, assessing properties such as computational runtimes, solution SWAP depths, and accumulated SWAP-gate error rates.
  arXiv  Detail & Related papers  (2024-05-29T05:59:15Z)
• Improving Qubit Routing by Using Entanglement Mediated Remote Gates [1.9299285312415735]
  Near-term quantum computers often have connectivity constraints, on which pairs of qubits in the device can interact. We develop a method to optimize the routing of circuits with both standard gates and EPR mediated remote controlled-NOT gates. We demonstrate that EPR-mediated operations can substantially reduce the total number of gates and depths of compiled circuits.
  arXiv  Detail & Related papers  (2023-09-22T18:51:36Z)
• On-Chip Hardware-Aware Quantization for Mixed Precision Neural Networks [52.97107229149988]
  We propose an On-Chip Hardware-Aware Quantization framework, performing hardware-aware mixed-precision quantization on deployed edge devices. For efficiency metrics, we built an On-Chip Quantization Aware pipeline, which allows the quantization process to perceive the actual hardware efficiency of the quantization operator. For accuracy metrics, we propose Mask-Guided Quantization Estimation technology to effectively estimate the accuracy impact of operators in the on-chip scenario.
  arXiv  Detail & Related papers  (2023-09-05T04:39:34Z)
• Qubit efficient quantum algorithms for the vehicle routing problem on NISQ processors [48.68474702382697]
  Vehicle routing problem with time windows (VRPTW) is a common optimization problem faced within the logistics industry. In this work, we explore the use of a previously-introduced qubit encoding scheme to reduce the number of binary variables.
  arXiv  Detail & Related papers  (2023-06-14T13:44:35Z)
• Compiling Quantum Circuits for Dynamically Field-Programmable Neutral Atoms Array Processors [5.012570785656963]
  Dynamically field-programmable qubit arrays (DPQA) have emerged as a promising platform for quantum information processing. In this paper, we consider a DPQA architecture that contains multiple arrays and supports 2D array movements. We show that our DPQA-based compiled circuits feature reduced scaling overhead compared to a grid fixed architecture.
  arXiv  Detail & Related papers  (2023-06-06T08:13:10Z)
• Mapping quantum circuits to modular architectures with QUBO [3.0148208709026005]
  In multi-core architectures, it is crucial to minimize the amount of communication between cores when executing an algorithm. We propose for the first time a Quadratic Unconstrained Binary Optimization technique to encode the problem and the solution. Our method showed promising results and performed exceptionally well with very dense and highly-parallelized circuits.
  arXiv  Detail & Related papers  (2023-05-11T09:45:47Z)
• Adaptable Butterfly Accelerator for Attention-based NNs via Hardware and Algorithm Co-design [66.39546326221176]
  Attention-based neural networks have become pervasive in many AI tasks. The use of the attention mechanism and feed-forward network (FFN) demands excessive computational and memory resources. This paper proposes a hardware-friendly variant that adopts a unified butterfly sparsity pattern to approximate both the attention mechanism and the FFNs.
  arXiv  Detail & Related papers  (2022-09-20T09:28:26Z)
• Accelerating variational quantum algorithms with multiple quantum processors [78.36566711543476]
  Variational quantum algorithms (VQAs) have the potential of utilizing near-term quantum machines to gain certain computational advantages. Modern VQAs suffer from cumbersome computational overhead, hampered by the tradition of employing a solitary quantum processor to handle large data. Here we devise an efficient distributed optimization scheme, called QUDIO, to address this issue.
  arXiv  Detail & Related papers  (2021-06-24T08:18:42Z)
• Ps and Qs: Quantization-aware pruning for efficient low latency neural network inference [56.24109486973292]
  We study the interplay between pruning and quantization during the training of neural networks for ultra low latency applications. We find that quantization-aware pruning yields more computationally efficient models than either pruning or quantization alone for our task.
  arXiv  Detail & Related papers  (2021-02-22T19:00:05Z)
• Adaptive pruning-based optimization of parameterized quantum circuits [62.997667081978825]
  Variisy hybrid quantum-classical algorithms are powerful tools to maximize the use of Noisy Intermediate Scale Quantum devices. We propose a strategy for such ansatze used in variational quantum algorithms, which we call "Efficient Circuit Training" (PECT) Instead of optimizing all of the ansatz parameters at once, PECT launches a sequence of variational algorithms.
  arXiv  Detail & Related papers  (2020-10-01T18:14:11Z)
• Space-efficient binary optimization for variational computing [68.8204255655161]
  We show that it is possible to greatly reduce the number of qubits needed for the Traveling Salesman Problem. We also propose encoding schemes which smoothly interpolate between the qubit-efficient and the circuit depth-efficient models.
  arXiv  Detail & Related papers  (2020-09-15T18:17:27Z)
• Hardware-Centric AutoML for Mixed-Precision Quantization [34.39845532939529]
  Conventional quantization algorithm ignores the different hardware architectures and quantizes all the layers in a uniform way. In this paper, we introduce the Hardware-Aware Automated Quantization (HAQ) framework which leverages the reinforcement learning to automatically determine the quantization policy. Our framework effectively reduced the latency by 1.4-1.95x and the energy consumption by 1.9x with negligible loss of accuracy compared with the fixed bitwidth (8 bits) quantization.
  arXiv  Detail & Related papers  (2020-08-11T17:30:22Z)

This list is automatically generated from the titles and abstracts of the papers in this site.

This site does not guarantee the quality of this site (including all information) and is not responsible for any consequences.