ReLACE: A Resource-Efficient Low-Latency Cortical Acceleration Engine
- URL: http://arxiv.org/abs/2510.17392v1
- Date: Mon, 20 Oct 2025 10:33:50 GMT
- Title: ReLACE: A Resource-Efficient Low-Latency Cortical Acceleration Engine
- Authors: Sonu Kumar, Arjun S. Nair, Bhawna Chaudhary, Mukul Lokhande, Santosh Kumar Vishvakarma,
- Abstract summary: We present a Cortical Neural Pool architecture featuring a CORDIC-based Hodgkin Huxley (RCHH) neuron model.<n>The FPGA implementation of the RCHH neuron shows 24.5% LUT reduction and 35.2% improved speed.<n>The design shows biologically accurate, low-resource spiking neural network implementations for resource-constrained edge AI applications.
- Score: 0.0
- License: http://creativecommons.org/licenses/by/4.0/
- Abstract: We present a Cortical Neural Pool (CNP) architecture featuring a high-speed, resource-efficient CORDIC-based Hodgkin Huxley (RCHH) neuron model. Unlike shared CORDIC-based DNN approaches, the proposed neuron leverages modular and performance-optimised CORDIC stages with a latency-area trade-off. The FPGA implementation of the RCHH neuron shows 24.5% LUT reduction and 35.2% improved speed, compared to SoTA designs, with 70% better normalised root mean square error (NRMSE). Furthermore, the CNP exhibits 2.85x higher throughput (12.69 GOPS) compared to a functionally equivalent CORDIC-based DNN engine, with only a 0.35% accuracy drop compared to the DNN counterpart on the MNIST dataset. The overall results indicate that the design shows biologically accurate, low-resource spiking neural network implementations for resource-constrained edge AI applications.
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