Implementation of Tensor Network Simulation TN-Sim under NWQ-Sim

• URL: http://arxiv.org/abs/2601.04422v1
• Date: Wed, 07 Jan 2026 22:01:35 GMT
• Title: Implementation of Tensor Network Simulation TN-Sim under NWQ-Sim
• Authors: Aaron C. Hoyt, Jonathan S. Bersson, Sean Garner, Chenxu Liu, Ang Li,
• Abstract summary: Large-scale tensor network simulations are crucial for developing robust complexity-theoretic bounds on classical quantum simulation.<n>We implement a tensor network simulator backend within the NWQ-Sim software package.<n>We demonstrate an MPS tensor network simulator running on the state-of-the-art Perlmutter ( NVIDIA) supercomputer.
• Score: 5.781957154737856
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: Large-scale tensor network simulations are crucial for developing robust complexity-theoretic bounds on classical quantum simulation, enabling circuit cutting approaches, and optimizing circuit compilation, all of which aid efficient quantum computation on limited quantum resources. Modern exascale high-performance computing platforms offer significant potential for advancing tensor network quantum circuit simulation capabilities. We implement TN-Sim, a tensor network simulator backend within the NWQ-Sim software package that utilizes the Tensor Algebra for Many-body Methods (TAMM) framework to support both distributed HPC-scale computations and local simulations with ITensor. To optimize the scale up in computation across multiple nodes we implement a task based parallelization scheme to demonstrate parallelized gate contraction for wide quantum circuits with many gates per layer. Through the integration of the TAMM framework with Matrix Product State (MPS) tensor network approaches, we deliver a simulation environment that can scale from local systems to HPC clusters. We demonstrate an MPS tensor network simulator running on the state-of-the-art Perlmutter (NVIDIA) supercomputer and discuss the potential portability of this software to HPC clusters such as Frontier (AMD) and Aurora (Intel). We also discuss future improvements including support for different tensor network topologies and enhanced computational efficiency.

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