FairWire: Fair Graph Generation

• URL: http://arxiv.org/abs/2402.04383v1
• Date: Tue, 6 Feb 2024 20:43:00 GMT
• Title: FairWire: Fair Graph Generation
• Authors: O. Deniz Kose and Yanning Shen
• Abstract summary: This work focuses on the analysis and mitigation of structural bias for both real and synthetic graphs. To alleviate the identified bias factors, we design a novel fairness regularizer that offers a versatile use. We propose a fair graph generation framework, FairWire, by leveraging our fair regularizer design in a generative model.
• Score: 18.6649050946022
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Machine learning over graphs has recently attracted growing attention due to its ability to analyze and learn complex relations within critical interconnected systems. However, the disparate impact that is amplified by the use of biased graph structures in these algorithms has raised significant concerns for the deployment of them in real-world decision systems. In addition, while synthetic graph generation has become pivotal for privacy and scalability considerations, the impact of generative learning algorithms on the structural bias has not yet been investigated. Motivated by this, this work focuses on the analysis and mitigation of structural bias for both real and synthetic graphs. Specifically, we first theoretically analyze the sources of structural bias that result in disparity for the predictions of dyadic relations. To alleviate the identified bias factors, we design a novel fairness regularizer that offers a versatile use. Faced with the bias amplification in graph generation models that is brought to light in this work, we further propose a fair graph generation framework, FairWire, by leveraging our fair regularizer design in a generative model. Experimental results on real-world networks validate that the proposed tools herein deliver effective structural bias mitigation for both real and synthetic graphs.

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