A Topologically Fault-Tolerant Quantum Computer with Four Dimensional Geometric Codes

• URL: http://arxiv.org/abs/2506.15130v1
• Date: Wed, 18 Jun 2025 04:14:52 GMT
• Title: A Topologically Fault-Tolerant Quantum Computer with Four Dimensional Geometric Codes
• Authors: David Aasen, Matthew B. Hastings, Vadym Kliuchnikov, Juan M. Bello-Rivas, Adam Paetznick, Rui Chao, Ben W. Reichardt, Matt Zanner, Marcus P. da Silva, Zhenghan Wang, Krysta M. Svore,
• Abstract summary: Topological quantum codes are intrinsically fault-tolerant to local noise, and underlie the theory of topological phases of matter.<n>We explore geometry to enhance the performance of topological quantum codes by rotating the four dimensional self-correcting quantum memory.<n>We identify a full set of logical Clifford operations and with it design a universal fault-tolerant quantum architecture.
• Score: 2.991272555043746
• License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
• Abstract: Topological quantum codes are intrinsically fault-tolerant to local noise, and underlie the theory of topological phases of matter. We explore geometry to enhance the performance of topological quantum codes by rotating the four dimensional self-correcting quantum memory, and present codes targeted to both near-term and utility-scale quantum computers. We identify a full set of logical Clifford operations and with it design a universal fault-tolerant quantum architecture. Our design achieves single-shot error correction, significant reductions in required qubits, and low-depth logical operations. In turn, our proposed architecture relaxes the requirements for achieving fault tolerance and offers an efficient path for realization in several near-term quantum hardware implementations. Our [[96,6,8]] 4D Hadamard lattice code has low weight-6 stabilizers and depth-8 syndrome extraction circuits, a high pseudo-threshold of $\sim 0.01$, and a logical error rate of $\sim 10^{-6}$ per logical qubit per round of error correction at $10^{-3}$ physical error rate under a standard circuit-level noise model. A Clifford-complete logical gate set is presented, including a constructive and efficient method for Clifford gate synthesis.

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