AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMs

• URL: http://arxiv.org/abs/2508.02518v1
• Date: Mon, 04 Aug 2025 15:25:48 GMT
• Title: AnalogCoder-Pro: Unifying Analog Circuit Generation and Optimization via Multi-modal LLMs
• Authors: Yao Lai, Souradip Poddar, Sungyoung Lee, Guojin Chen, Mengkang Hu, Bei Yu, Ping Luo, David Z. Pan,
• Abstract summary: Large Language Models (LLMs) have brought new promise to analog design automation.<n>We propose AnalogCoder-Pro, a unified framework that integrates generative capabilities and optimization techniques.<n>We show that these approaches significantly improve the success rate of analog circuit design and enhance circuit performance.
• Score: 30.598442053557896
• License: http://creativecommons.org/licenses/by-nc-sa/4.0/
• Abstract: Despite advances in analog design automation, analog front-end design still heavily depends on expert intuition and iterative simulations, underscoring critical gaps in fully automated optimization for performance-critical applications. Recently, the rapid development of Large Language Models (LLMs) has brought new promise to analog design automation. However, existing work remains in its early stages, and holistic joint optimization for practical end-to-end solutions remains largely unexplored. We propose AnalogCoder-Pro, a unified multimodal LLM-based framework that integrates generative capabilities and optimization techniques to jointly explore circuit topologies and optimize device sizing, automatically generating performance-specific, fully sized schematic netlists. AnalogCoder-Pro employs rejection sampling for fine-tuning LLMs on high-quality synthesized circuit data and introduces a multimodal diagnosis and repair workflow based on functional specifications and waveform images. By leveraging LLMs to interpret generated circuit netlists, AnalogCoder-Pro automates the extraction of critical design parameters and the formulation of parameter spaces, establishing an end-to-end workflow for simultaneous topology generation and device sizing optimization. Extensive experiments demonstrate that these orthogonal approaches significantly improve the success rate of analog circuit design and enhance circuit performance.

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