HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inference

• URL: http://arxiv.org/abs/2604.22293v1
• Date: Fri, 24 Apr 2026 07:13:30 GMT
• Title: HGQ-LUT: Fast LUT-Aware Training and Efficient Architectures for DNN Inference
• Abstract summary: This work presents HGQ-LUT, a new LAT approach that achieves state-of-the-art hardware efficiency while accelerating training by over 100 times on modern GPUs.<n>By combining LUT-Dense and LUT-Conv layers, HGQ-LUT enables the automatic exploration of accuracy-resource trade-offs without manual bit-width tuning.<n>We further integrate HGQ-LUT into open-source toolchains, enabling unified design, compilation, and bit-exact verification of hybrid architectures.
• Score: 12.364180908244188
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: Lookup-table (LUT) based neural networks can deliver ultra-low latency and excellent hardware efficiency on FPGAs by mapping arithmetic operations directly onto the logic primitives. However, state-of-the-art LUT-aware training (LAT) approaches remain difficult to use in practice: they are often orders of magnitude slower to train than conventional networks, require non-trivial manual tuning for hardware efficiency, and lack an end-to-end workflow. This work presents HGQ-LUT, integrated in https://github.com/calad0i/HGQ2, a new LAT approach that achieves state-of-the-art hardware efficiency while accelerating training by over 100 times on modern GPUs. HGQ-LUT introduces LUT-Dense and LUT-Conv layers that are implemented with regular, accelerator-efficient tensor operations during training, which are then compiled into logic LUTs for hardware. By combining these layers with fine-grained, element-wise heterogeneous quantization (including zero-bit pruning) and a LUT-aware resource surrogate, HGQ-LUT enables the automatic exploration of accuracy-resource trade-offs without manual bit-width tuning. We further integrate HGQ-LUT into open-source toolchains, enabling unified design, compilation, and bit-exact verification of hybrid architectures that mix LUT-based with conventional arithmetic blocks. These features make LAT-based DNNs practical for real-world deployment, such as at the CERN Large Hadron Collider's experiments.

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