HORCRUX: A Complete PQC RISC-V eXtension Architecture

• URL: http://arxiv.org/abs/2607.13939v1
• Date: Wed, 15 Jul 2026 15:21:26 GMT
• Title: HORCRUX: A Complete PQC RISC-V eXtension Architecture
• Abstract summary: This work presents a compact RISC-V extension for Post-Quantum Cryptography (PQC) called HORCRUX.<n>HorCRUX addresses the difficult trade-off between crypto-agility, high performance, and low resource consumption in constrained environments.<n>The extension's modular structure maintains backward compatibility with standard RISC-V cores, offering a scalable solution for deploying PQC on constrained embedded systems.
• Score: 37.36871652478481
• License: http://creativecommons.org/licenses/by-nc-sa/4.0/
• Abstract: This work presents a compact RISC-V extension for Post-Quantum Cryptography (PQC) called HORCRUX, which provides a unified Instruction-Set Extension (ISE) supporting all NIST-approved PQC algorithms. HORCRUX addresses the difficult trade-off between crypto-agility, high performance, and low resource consumption in constrained environments, a balance typically missing in hardware extensions that focus on limited PQC subsets. By targeting shared kernels across ML-KEM, MLDSA, SLH-DSA, HQC, and Falcon, the extension introduces new RISC-V instructions executed by a resource-efficient, tightly coupled coprocessor. This architecture is specifically optimized for embedded systems with strict energy budgets and limited area. Experimental evaluation on a Zynq UltraScale+ FPGA demonstrates speedups of up to 129x for hash-based, 9x for lattice-based, and 27x for code-based schemes, while adding fewer than 21k LUTs and 4.4k FFs. ASIC results from postsynthesis characterization in 65 nm CMOS are also reported, alongside a rigorous power characterization to validate the architecture's energy efficiency. The extension's modular structure maintains backward compatibility with standard RISC-V cores, offering a scalable solution for deploying PQC on constrained embedded systems.

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