QECC-Synth: A Layout Synthesizer for Quantum Error Correction Codes on Sparse Hardware Architectures

• URL: http://arxiv.org/abs/2308.06428v4
• Date: Mon, 11 Nov 2024 08:30:42 GMT
• Title: QECC-Synth: A Layout Synthesizer for Quantum Error Correction Codes on Sparse Hardware Architectures
• Authors: Keyi Yin, Hezi Zhang, Xiang Fang, Yunong Shi, Travis Humble, Ang Li, Yufei Ding,
• Abstract summary: Quantum Error Correction (QEC) codes are essential for achieving fault-tolerant quantum computing. Current approaches either underutilize QEC circuit features or focus on manual designs tailored to specific codes and architectures. We introduce QECC- Synth, an automated compiler for QEC code implementation that addresses these challenges.
• Score: 14.785334649858498
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• Abstract: Quantum Error Correction (QEC) codes are essential for achieving fault-tolerant quantum computing (FTQC). However, their implementation faces significant challenges due to disparity between required dense qubit connectivity and sparse hardware architectures. Current approaches often either underutilize QEC circuit features or focus on manual designs tailored to specific codes and architectures, limiting their capability and generality. In response, we introduce QECC-Synth, an automated compiler for QEC code implementation that addresses these challenges. We leverage the ancilla bridge technique tailored to the requirements of QEC circuits and introduces a systematic classification of its design space flexibilities. We then formalize this problem using the MaxSAT framework to optimize these flexibilities. Evaluation shows that our method significantly outperforms existing methods while demonstrating broader applicability across diverse QEC codes and hardware architectures.

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