TLGLock: A New Approach in Logic Locking Using Key-Driven Charge Recycling in Threshold Logic Gates
- URL: http://arxiv.org/abs/2508.17809v1
- Date: Mon, 25 Aug 2025 08:57:36 GMT
- Title: TLGLock: A New Approach in Logic Locking Using Key-Driven Charge Recycling in Threshold Logic Gates
- Authors: Abdullah Sahruri, Martin Margala,
- Abstract summary: We present TLGLock, a new design paradigm for logic locking.<n>By embedding the key into the gate's weighted logic, TLGLock provides a stateless and compact alternative to conventional locking techniques.<n>Results show that TLGLock achieves up to 30% area, 50% delay, and 20% power savings.
- Score: 0.0
- License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
- Abstract: Logic locking remains one of the most promising defenses against hardware piracy, yet current approaches often face challenges in scalability and design overhead. In this paper, we present TLGLock, a new design paradigm that leverages the structural expressiveness of Threshold Logic Gates (TLGs) and the energy efficiency of charge recycling to enforce key-dependent functionality at the gate level. By embedding the key into the gate's weighted logic and utilizing dynamic charge sharing, TLGLock provides a stateless and compact alternative to conventional locking techniques. We implement a complete synthesis-to-locking flow and evaluate it using ISCAS, ITC, and MCNC benchmarks. Results show that TLGLock achieves up to 30% area, 50% delay, and 20% power savings compared to latch-based locking schemes. In comparison with XOR and SFLL-HD methods, TLGLock offers up to 3x higher SAT attack resistance with significantly lower overhead. Furthermore, randomized key-weight experiments demonstrate that TLGLock can reach up to 100% output corruption under incorrect keys, enabling tunable security at minimal cost. These results position TLGLock as a scalable and resilient solution for secure hardware design.
Related papers
- Boosting Device Utilization in Control Flow Auditing [47.36491265793223]
Control Flow (CFAud) is a mechanism wherein a remote verifier (Vrf) is guaranteed to received evidence about the control flow path taken on a prover (Prv) MCU, even when Prv software is compromised.<n>Current CFAud requires a busy-wait'' phase where root-of-anchored root-of-RoT in Prv retains execution to ensure delivery of flow evidence to Vrf.<n>CARAMEL is a hardware RoT co-design that enables Prv to resume while control flow evidence is transmitted to Vrf.
arXiv Detail & Related papers (2026-03-02T18:26:17Z) - Locket: Robust Feature-Locking Technique for Language Models [11.207682710536927]
We present Locket, the first robust and scalable FLoTE to enable pay-to-unlock schemes.<n>Locket is effective ($100$% refusal on locked features), utility-preserving ($leq 7$% utility degradation in unlocked features), robust ($leq 5$% attack success rate), and scales to multiple features and clients.
arXiv Detail & Related papers (2025-10-14T03:35:59Z) - Secure Tug-of-War (SecTOW): Iterative Defense-Attack Training with Reinforcement Learning for Multimodal Model Security [63.41350337821108]
We propose Secure Tug-of-War (SecTOW) to enhance the security of multimodal large language models (MLLMs)<n>SecTOW consists of two modules: a defender and an auxiliary attacker, both trained iteratively using reinforcement learning (GRPO)<n>We show that SecTOW significantly improves security while preserving general performance.
arXiv Detail & Related papers (2025-07-29T17:39:48Z) - BlockFFN: Towards End-Side Acceleration-Friendly Mixture-of-Experts with Chunk-Level Activation Sparsity [66.94629945519125]
We introduce a novel MoE architecture, BlockFFN, as well as its efficient training and deployment techniques.<n>Specifically, we use a router integrating ReLU activation and RMSNorm for differentiable and flexible routing.<n>Next, to promote both token-level sparsity (TLS) and chunk-level sparsity ( CLS), CLS-aware training objectives are designed, making BlockFFN more acceleration-friendly.
arXiv Detail & Related papers (2025-07-11T17:28:56Z) - Multi-Target Rydberg Gates via Spatial Blockade Engineering [47.582155477608445]
Multi-target gates offer the potential to reduce gate depth in syndrome extraction for quantum error correction.<n>We propose single-control-multi-target CZotimes N gates on a single-species neutral-atom platform.<n>We synthesise smooth control pulses for CZZ and CZZZ gates, achieving fidelities of up to 99.55% and 99.24%, respectively.
arXiv Detail & Related papers (2025-04-21T17:59:56Z) - Cute-Lock: Behavioral and Structural Multi-Key Logic Locking Using Time Base Keys [1.104960878651584]
We propose, implement and evaluate a family of secure multi-key logic locking algorithms called Cute-Lock.<n>Our experimental results under a diverse range of attacks confirm that, compared to vulnerable state-of-the-art methods, employing the Cute-Lock family drives attacking attempts to a dead end without additional overhead.
arXiv Detail & Related papers (2025-01-29T03:44:55Z) - K-Gate Lock: Multi-Key Logic Locking Using Input Encoding Against Oracle-Guided Attacks [1.104960878651584]
K-Gate Lock encodes input patterns using multiple keys that are applied to one set of key inputs at different operational times.<n>Uses multiple keys will make the circuit secure against oracle-guided attacks and increase attacker efforts to an exponentially time-consuming brute force search.
arXiv Detail & Related papers (2025-01-03T22:07:38Z) - Convolutional Differentiable Logic Gate Networks [68.74313756770123]
We propose an approach for learning logic gate networks directly via a differentiable relaxation.
We build on this idea, extending it by deep logic gate tree convolutions and logical OR pooling.
On CIFAR-10, we achieve an accuracy of 86.29% using only 61 million logic gates, which improves over the SOTA while being 29x smaller.
arXiv Detail & Related papers (2024-11-07T14:12:00Z) - Exploiting the Lock: Leveraging MiG-V's Logic Locking for Secret-Data Extraction [0.16492989697868893]
MiG-V is the first commercially available logic-locked RISC-V processor.
We show that changing a single bit of the logic locking key can expose 100% of the cryptographic encryption key.
arXiv Detail & Related papers (2024-08-09T09:59:23Z) - SubLock: Sub-Circuit Replacement based Input Dependent Key-based Logic Locking for Robust IP Protection [1.804933160047171]
Existing logic locking techniques are vulnerable to SAT-based attacks.
Several SAT-resistant logic locking methods are reported; they require significant overhead.
This paper proposes a novel input dependent key-based logic locking (IDKLL) that effectively prevents SAT-based attacks with low overhead.
arXiv Detail & Related papers (2024-06-27T11:17:06Z) - KRATT: QBF-Assisted Removal and Structural Analysis Attack Against Logic Locking [2.949446809950691]
KRATT is a removal and structural analysis attack against state-of-the-art logic locking techniques.
It can handle locked circuits under both oracle-less (OL) and oracle-guided (OG) threat models.
It can decipher a large number of key inputs of Ss and Ds with high accuracy under the OL threat model, and can easily find the secret key of Ds under the OG threat model.
arXiv Detail & Related papers (2023-11-10T10:51:00Z) - Logical blocks for fault-tolerant topological quantum computation [55.41644538483948]
We present a framework for universal fault-tolerant logic motivated by the need for platform-independent logical gate definitions.
We explore novel schemes for universal logic that improve resource overheads.
Motivated by the favorable logical error rates for boundaryless computation, we introduce a novel computational scheme.
arXiv Detail & Related papers (2021-12-22T19:00:03Z)
This list is automatically generated from the titles and abstracts of the papers in this site.
This site does not guarantee the quality of this site (including all information) and is not responsible for any consequences.