Monolithic Integration of Quantum Resonant Tunneling Gate on a 22nm FD-SOI CMOS Process

• URL: http://arxiv.org/abs/2112.04586v2
• Date: Fri, 4 Feb 2022 18:30:46 GMT
• Title: Monolithic Integration of Quantum Resonant Tunneling Gate on a 22nm FD-SOI CMOS Process
• Authors: Imran Bashir, Dirk Leipold, Elena Blokhina, Mike Asker, David Redmond, Ali Esmailiyan, Panagiotis Giounanlis, Hans Haenlein, Xuton Wu, Andrii Sokolov, Dennis Andrade-Miceli, Andrew K. Mitchell, Robert Bogdan Staszewski
• Abstract summary: We present a fully integrated Quantum Processor Unit in which the quantum core is co-located with control and detection circuits on the same die. The power consumption of each detector and injector is 1mW and 0.27mW, respectively. We demonstrate the feasibility of the proposed architecture in scaling-up the existing quantum core to thousands of qubits.
• Score: 0.0
• License: http://creativecommons.org/licenses/by/4.0/
• Abstract: The proliferation of quantum computing technologies has fueled the race to build a practical quantum computer. The spectrum of the innovation is wide and encompasses many aspects of this technology, such as the qubit, control and detection mechanism, cryogenic electronics, and system integration. A few of those emerging technologies are poised for successful monolithic integration of cryogenic electronics with the quantum structure where the qubits reside. In this work, we present a fully integrated Quantum Processor Unit in which the quantum core is co-located with control and detection circuits on the same die in a commercial 22-nm FD-SOI process from GlobalFoundries. The system described in this work comprises a two dimensional (2D) 240 qubits array integrated with 8 detectors and 32 injectors operating at 3K and inside a two-stage Gifford-McMahon cryo-cooler. The power consumption of each detector and injector is 1mW and 0.27mW, respectively. The control sequence is programmed into an on-chip pattern generator that acts as a command and control block for all hardware in the Quantum Processor Unit. Using the aforementioned apparatus, we performed a quantum resonant tunneling experiment on two qubits inside the 2D qubit array. With supporting lab measurements, we demonstrate the feasibility of the proposed architecture in scaling-up the existing quantum core to thousands of qubits.

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