The SpinBus Architecture: Scaling Spin Qubits with Electron Shuttling
- URL: http://arxiv.org/abs/2306.16348v1
- Date: Wed, 28 Jun 2023 16:24:11 GMT
- Title: The SpinBus Architecture: Scaling Spin Qubits with Electron Shuttling
- Authors: Matthias K\"unne, Alexander Willmes, Max Oberl\"ander, Christian
Gorjaew, Julian D. Teske, Harsh Bhardwaj, Max Beer, Eugen Kammerloher, Ren\'e
Otten, Inga Seidler, Ran Xue, Lars R. Schreiber and Hendrik Bluhm
- Abstract summary: We introduce the SpinBus architecture, which uses electron shuttling to connect qubits and features low operating frequencies and enhanced qubit coherence.
Control using room temperature instruments can plausibly support at least 144 qubits, but much larger numbers are conceivable with cryogenic control circuits.
- Score: 42.60602838972598
- License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
- Abstract: Quantum processor architectures must enable scaling to large qubit numbers
while providing two-dimensional qubit connectivity and exquisite operation
fidelities. For microwave-controlled semiconductor spin qubits, dense arrays
have made considerable progress, but are still limited in size by wiring
fan-out and exhibit significant crosstalk between qubits. To overcome these
limitations, we introduce the SpinBus architecture, which uses electron
shuttling to connect qubits and features low operating frequencies and enhanced
qubit coherence. Device simulations for all relevant operations in the Si/SiGe
platform validate the feasibility with established semiconductor patterning
technology and operation fidelities exceeding 99.9 %. Control using room
temperature instruments can plausibly support at least 144 qubits, but much
larger numbers are conceivable with cryogenic control circuits. Building on the
theoretical feasibility of high-fidelity spin-coherent electron shuttling as
key enabling factor, the SpinBus architecture may be the basis for a spin-based
quantum processor that meets the scalability requirements for practical quantum
computing.
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