Limited Parallelization in Gate Operations Leads to Higher Space Overhead and Lower Noise Threshold
- URL: http://arxiv.org/abs/2410.04156v3
- Date: Fri, 14 Feb 2025 12:06:22 GMT
- Title: Limited Parallelization in Gate Operations Leads to Higher Space Overhead and Lower Noise Threshold
- Authors: Sai Sanjay Narayanan, Smita Bagewadi, Avhishek Chatterjee,
- Abstract summary: In a modern error corrected quantum memory or circuit, parallelization of gate operations is severely restricted due to issues like cross-talk.<n>In this paper, we obtain an analytical lower bound on the required space overhead in terms of the level of parallelization for an error correction framework.
- Score: 1.17431678544333
- License: http://arxiv.org/licenses/nonexclusive-distrib/1.0/
- Abstract: In a modern error corrected quantum memory or circuit, parallelization of gate operations is severely restricted due to issues like cross-talk. Hence, there are enough idle qubits not undergoing gate operations either during the computation phase or during the error correction phase, which suffer further decoherence while waiting. Thus, in reality, the space overhead and the noise threshold would depend on the level of gate parallelization. In this paper, we obtain an analytical lower bound on the required space overhead in terms of the level of parallelization for an error correction framework that has more error correction capability than the existing ones. We consider two types of errors: i.i.d. erasure and depolarization. In comparison to the known lower bounds which assume full gate parallelization, our bound is provably strictly larger despite allowing more capability to the error correction framework. This shows the steep price to be paid for lack of gate parallelization. An implication of the bound is that the noise or decoherence threshold, i.e., the noise beyond which no fault-tolerant memory or circuit can be realized, vanishes if the number of parallel gate operations does not scale linearly with the number of physical qubits.
Related papers
- Bias-preserving and error-detectable entangling operations in a superconducting dual-rail system [2.6938073024114755]
We design and realize a novel two-qubit gate for dual-rail erasure qubits based on superconducting microwave cavities.
The gate is high-speed ($sim$500 ns duration), and yields a residual gate infidelity after error detection below 0.1%.
We measure low erasure rates of $sim$0.5% per gate, as well as low and asymmetric dephasing errors that occur at least three times more frequently on control qubits.
arXiv Detail & Related papers (2025-03-13T22:49:43Z) - Performance Analysis for Crosstalk Errors between Parallel Entangling Gates in Trapped Ion Quantum Error Correction [0.0]
We numerically calculate the logical error rates and coherence times under various crosstalk errors, gate infidelities and coherence times of the physical qubits.
We show that a break-even point can be reached under realistic parameters.
arXiv Detail & Related papers (2025-01-16T14:15:51Z) - Low-overhead fault-tolerant quantum computation by gauging logical operators [0.7673339435080445]
Recent progress has uncovered quantum error-correcting codes with sparse connectivity requirements and constant qubit overhead.
Existing schemes for fault-tolerant logical measurement do not always achieve low qubit overhead.
We present a low-overhead method to implement fault-tolerant logical measurement in a quantum error-correcting code by treating the logical operator as a symmetry and gauging it.
arXiv Detail & Related papers (2024-10-03T05:04:12Z) - Differential error feedback for communication-efficient decentralized learning [48.924131251745266]
We propose a new decentralized communication-efficient learning approach that blends differential quantization with error feedback.
We show that the resulting communication-efficient strategy is stable both in terms of mean-square error and average bit rate.
The results establish that, in the small step-size regime and with a finite number of bits, it is possible to attain the performance achievable in the absence of compression.
arXiv Detail & Related papers (2024-06-26T15:11:26Z) - Fault-tolerant quantum architectures based on erasure qubits [49.227671756557946]
We exploit the idea of erasure qubits, relying on an efficient conversion of the dominant noise into erasures at known locations.
We propose and optimize QEC schemes based on erasure qubits and the recently-introduced Floquet codes.
Our results demonstrate that, despite being slightly more complex, QEC schemes based on erasure qubits can significantly outperform standard approaches.
arXiv Detail & Related papers (2023-12-21T17:40:18Z) - Optimizing quantum gates towards the scale of logical qubits [78.55133994211627]
A foundational assumption of quantum gates theory is that quantum gates can be scaled to large processors without exceeding the error-threshold for fault tolerance.
Here we report on a strategy that can overcome such problems.
We demonstrate it by choreographing the frequency trajectories of 68 frequency-tunablebits to execute single qubit while superconducting errors.
arXiv Detail & Related papers (2023-08-04T13:39:46Z) - Hamiltonian Phase Error in Resonantly Driven CNOT Gate Above the
Fault-Tolerant Threshold [0.0]
electron spin qubits are a promising platform for scalable quantum processors.
A full-fledged quantum computer will need quantum error correction, which requires high-fidelity quantum gates.
We demonstrate a simple yet reliable calibration procedure for a high-fidelity controlled-rotation gate in an exchange-always-on Silicon quantum processor.
arXiv Detail & Related papers (2023-07-18T07:44:00Z) - Demonstrating a long-coherence dual-rail erasure qubit using tunable transmons [59.63080344946083]
We show that a "dual-rail qubit" consisting of a pair of resonantly coupled transmons can form a highly coherent erasure qubit.
We demonstrate mid-circuit detection of erasure errors while introducing $ 0.1%$ dephasing error per check.
This work establishes transmon-based dual-rail qubits as an attractive building block for hardware-efficient quantum error correction.
arXiv Detail & Related papers (2023-07-17T18:00:01Z) - High-fidelity parallel entangling gates on a neutral atom quantum
computer [41.74498230885008]
We report the realization of two-qubit entangling gates with 99.5% fidelity on up to 60 atoms in parallel.
These advances lay the groundwork for large-scale implementation of quantum algorithms, error-corrected circuits, and digital simulations.
arXiv Detail & Related papers (2023-04-11T18:00:04Z) - Calibration of Drive Non-Linearity for Arbitrary-Angle Single-Qubit
Gates Using Error Amplification [43.97138136532209]
Non-linearity of qubit drive line components imposes a limit on the fidelity of single-qubit gates.
We demonstrate arbitrary-angle single-qubit gates with coherence-limited errors of $2times 10-4$ and leakage below $6times 10-5$.
arXiv Detail & Related papers (2022-12-02T10:34:43Z) - A Converse for Fault-tolerant Quantum Computation [1.2031796234206134]
In this paper, we obtain a lower bound on the redundancy required for $epsilon$-accurate implementation of a class of operations that includes unitary operators.
For the practically relevant case of sub-exponential depth and sub-linear gate size, our bound on redundancy is tighter than the known lower bounds.
arXiv Detail & Related papers (2022-11-01T18:43:14Z) - Optimizing Rydberg Gates for Logical Qubit Performance [0.0]
We present a family of Rydberg blockade gates for neutral atom qubits that are robust against two common, major imperfections.
These gates outperform existing gates for moderate or large imperfections.
Results significantly reduce the laser stability and atomic temperature requirements to achieve fault-tolerant quantum computing with neutral atoms.
arXiv Detail & Related papers (2022-10-13T10:04:08Z) - Benchmarking quantum logic operations relative to thresholds for fault
tolerance [0.02171671840172762]
We use gate set tomography to perform precision characterization of a set of two-qubit logic gates to study RC on a superconducting quantum processor.
We show that the average and worst-case error rates are equal for randomly compiled gates, and measure a maximum worst-case error of 0.0197(3) for our gate set.
arXiv Detail & Related papers (2022-07-18T17:41:58Z) - Software mitigation of coherent two-qubit gate errors [55.878249096379804]
Two-qubit gates are important components of quantum computing.
But unwanted interactions between qubits (so-called parasitic gates) can degrade the performance of quantum applications.
We present two software methods to mitigate parasitic two-qubit gate errors.
arXiv Detail & Related papers (2021-11-08T17:37:27Z) - Accurate methods for the analysis of strong-drive effects in parametric
gates [94.70553167084388]
We show how to efficiently extract gate parameters using exact numerics and a perturbative analytical approach.
We identify optimal regimes of operation for different types of gates including $i$SWAP, controlled-Z, and CNOT.
arXiv Detail & Related papers (2021-07-06T02:02:54Z) - Engineering fast bias-preserving gates on stabilized cat qubits [64.20602234702581]
bias-preserving gates can significantly reduce resource overhead for fault-tolerant quantum computing.
In this work, we apply a derivative-based leakage suppression technique to overcome non-adiabatic errors.
arXiv Detail & Related papers (2021-05-28T15:20:21Z) - Crosstalk Suppression for Fault-tolerant Quantum Error Correction with
Trapped Ions [62.997667081978825]
We present a study of crosstalk errors in a quantum-computing architecture based on a single string of ions confined by a radio-frequency trap, and manipulated by individually-addressed laser beams.
This type of errors affects spectator qubits that, ideally, should remain unaltered during the application of single- and two-qubit quantum gates addressed at a different set of active qubits.
We microscopically model crosstalk errors from first principles and present a detailed study showing the importance of using a coherent vs incoherent error modelling and, moreover, discuss strategies to actively suppress this crosstalk at the gate level.
arXiv Detail & Related papers (2020-12-21T14:20:40Z) - Asymmetry of CNOT gate operation in superconducting transmon quantum
processors using cross-resonance entangling [0.0]
Controlled-NOT (CNOT) gates are commonly included in the standard gate set of quantum processors.
We have explored this using quantum processors on the IBM Q network.
An asymmetry in the error of the final state was observed that increased with the circuit depth.
arXiv Detail & Related papers (2020-09-02T20:42:27Z) - Benchmarking Coherent Errors in Controlled-Phase Gates due to Spectator
Qubits [0.0]
We benchmark phase errors in a controlled-phase gate due to dispersive coupling of either of the qubits involved in the gate to one or more spectator qubits.
Our work is important for understanding limits to the fidelity of two-qubit gates with finite on/off ratio in multi-qubit settings.
arXiv Detail & Related papers (2020-05-12T16:44:27Z)
This list is automatically generated from the titles and abstracts of the papers in this site.
This site does not guarantee the quality of this site (including all information) and is not responsible for any consequences.